Department of Computer Science
COMP2120 Computer Organization
Assignment 5
Due Date : 11pm, 8th May 2025
1. Consider a Serial Interface (e.g. Modem), containing a Control & Status Register and two Buffer Registers, Input and Output Buffer Register, residing in memory location SCSR, SBRI and SBRO,
The SCSR has the following format:
Bit 0 =1 if Device Error
Bit 1 =1 if Device Ready
Bit 2 =0 if next operation is Write, 1, Read
Bit 3-5 =000 if speed = 4800 bps
=001 if speed = 9600 bps
=010 if speed = 19200 bps
=011 if speed = 57600 bps
=100 if spped = 115200 bps
Bit 6 =0 if odd parity, 1 if even parity
Write an assembly program, using any instructions set (you may invent your own instructions) to output an array of 10 characters by Program I/O, to the serial port, using a speed of 115200 bps and even parity.
To simplify the problem, you may assume that the array of characters is stored in memory location LINE, with one character in one word.
Only source program is needed.
2. Given the data path of a CPU as in Assignment 4 with the modification that the MBR provides data to both S1-Bus and S2-Bus. Consider another instruction set, which allows memory operands, and the addressing mode information is stored in the same byte as the register operand. Describe the data transfer/transformation for the following 2-word instruction:
ADD OFF(R1), R2, R3
which will get the first operand from memory whose address is given by OFF+R1 (dis- placement addressing mode), add it to R2 and put the result in R3. OFF is stored in the word following the instruction:
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ADD
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R1(disp mode)
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R2
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R3
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OFF
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